The present invention relates to a semiconductor device and a pattern layout method thereof, particularly a pattern layout construction of a display driver and the like having an anode driver and a cathode driver for example and making them in one chip, and pattern layout method thereof.
A semiconductor device constituting the above-mentioned display driver and the like will be described referring a drawing.
In the above-mentioned display, there are various kinds of flat panel displays such as an LCD, an LED display, an organic EL (Electroluminescence) display, an inorganic EL display, a PDP (Plasma Display Panel), an FED (Field Emission Display), and so on.
An organic EL display driver will be described below as an example, which has an anode driver and a cathode driver for example, supplies constant current to the organic EL element, and makes the organic EL element emit light. Since the EL element has many merits such that a back light required in a liquid crystal display is not necessitated because of self-luminescence and that there is not limit about visual field angle, application for display device of next generation is expected. Especially, it is known that the organic EL element is possible in high brightness and superior than an inorganic EL element in high efficiency, high response characteristic, and multiple color.
The above-mentioned organic EL display driver includes logic N-channel MOS transistor and P-channel MOS transistor, N-channel high-voltage MOS transistor and P-channel high-voltage MOS transistor of high withstand voltage, N-channel high-voltage MOS transistor and P-channel high-voltage MOS transistor of high withstand voltage reduced in on-resistance, N-channel MOS transistor for a level shifter, and so on. Here, a DMOS (Double-diffused Metal-Oxide Semiconductor) transistor and the like are used for the high-voltage MOS transistor reduced in on-resistance for example. In the above-mentioned DMOS transistor construction, new diffusion region is formed by diffusing impurity different in conductive type to diffusion region formed at surface side of semiconductor substrate and difference of vertical direction diffusion of these diffusion regions is used as effective channel length so that the transistor is an element suitable for low on-resistance by forming short channel.
A pattern layout of a semiconductor device at constituting various kinds of drivers such as the above-mentioned the organic EL display driver has constitution where required numbers of output of layouts for one bit output are arranged repeatedly.
That is, FIG. 13 is a sectional view showing a pattern layout of a semiconductor device for driver, and required numbers of output of layouts for one bit output are arranged repeatedly.
Here, numeral 1 in FIG. 13 denotes output region corresponding to one bit, and a driver portion where the plural output regions 1 for one bit are arranged so as to have desired numbers of output is constituted. Numeral 2 denotes wiring for gate electrode formed in the output region 1, and source region (S) and drain region (D) are formed so as to be adjacent to the wiring for gate electrode 2. (See enlarged view in the circle in FIG. 13.)
Here, a problem of variation between bits rises as multi bits advance. That is, the variation between bits causes to generate micro-loading effect by difference between fineness and roughness of gate electrode forming pattern, and occasionally finishing shape and working dimension of the gate electrode go wrong by the effect.
Especially, when the organic EL display driver having the anode driver, the cathode driver, and the like as above-mentioned are made in one chip, each driver portion is mounted mixedly naturally. Therefore, the above-mentioned difference between fineness and roughness of the gate electrode forming pattern becomes large, micro-loading effect generates easily at photolithography and etching, variation of finishing shape and working dimension of the gate electrode caused by the effect becomes large, and being out of order in display generates.